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Colorado Engineering Receives Second Tibbetts Award for Exceptional Successes Achieved through SBIR/STTR Program

The U.S. Small Business Administration (SBA) announced today that Colorado Engineering Inc. (CEI) is one of 38 companies, seven organizations and 14 individuals that will receive the prestigious 2020 Tibbetts Award for their accomplishments in creating cutting-edge technologies. The Tibbetts Awards, named after Roland Tibbetts, the founder of the SBIR Program, honors these awardees for the exceptional successes they achieved through SBA’s Small Business Innovation Research (SBIR) and Small Business Technology Transfer (STTR) programs.

The Tibbetts awards recognize the creative and impactful way organizations and individuals have supported the rising tech entrepreneur, especially in creating success with underrepresented communities. A complete list of winners can be found here. Since its inception in 1982, the program has awarded over 170,000 awards with over $50 billion in funding to small businesses through the 11 participating federal agencies. It boasts one of the highest returns on taxpayer investment when measuring federal funding and economic impact.

CEI won its first Tibbetts award in 2011. It has also received 39 Phase I, 20 Phase II, and one Phase III SBIR/STTR awards since its founding in 2003.

CEI is a small, woman-owned business headquartered in Colorado Springs. It is one of the world’s foremost leading radio frequency (RF) and high-performance computing (HPC) solutions providers offering bleeding-edge technology solutions for the commercial, industrial, automotive, and military industries. CEI supplies off-the-shelf solutions for hardware and software as well as custom-tailored solutions for any application. CEI offers quick turn, innovative solutions, allowing for lower costs, and high-quality designs.

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Colorado Engineering using Intel Agilex FPGA in PCIE Development Platform

[vc_row][vc_column][vc_column_text]Colorado Engineering Inc. (CEI) is one of just a few select companies using samples of the just-released Intel® Agilex™ FPGA in its lower-cost PCIE development platform. CEI also plans to develop appropriate host drivers, specific algorithms, and other associated IP for the board to create a turnkey development platform for  designs based on the Agilex.

Intel Agilex FPGAs provide the flexibility and agility required to meet the challenges of a data-centric, 5G-fueled era by delivering significant gains in performance and inherent low latency. Reconfigurable and with reduced power consumption, Agilex FPGAs have computation and high-speed interfacing capabilities that enable the creation of smarter, higher bandwidth networks and help deliver real-time actionable insights via accelerated artificial intelligence (AI) and other analytics performed at the edge, in the cloud and throughout the network.

CEI’s mixed-signal processing board – the Peregrine II Digital Receiver/Exciter (DREX) – targets 5G SDR applications. Peregrine II incorporates five Intel Stratix® 10 GX FPGAs and an Intel Core i7™ processor mounted on a single-board computer (SBC) module that plugs into a COM Express site on the board. Learn more about the Peregrine II development platform or the upcoming development platform based on the Agilex Stratix 10 FPGAs.

CEI created more than 50 FPGA-based designs for a variety of clients, including Intel and Altera. The small, woman-owned, Colorado-based business has experience in FPGA-based design dating back to the 1980s. Early on, CEI primarily served the military and aerospace sectors, but has since expanded to other markets such as computing and storage, test and measurement, software-defined radio (SDR), and 5G fronthaul applications. CEI specializes in analog or digital applications requiring high-speed, high-performance processing, and turnkey design solutions. CEI is a platinum member of the Intel Design Solutions Network and has several other key industry partnerships. Visit ColoradoEngineering.com to learn more.

Intel (NASDAQ: INTC), a leader in the semiconductor industry, is shaping the data-centric future with computing and communications technology that is the foundation of the world’s innovations. The company’s engineering expertise is helping address the world’s greatest challenges as well as helping secure, power and connect billions of devices and the infrastructure of the smart, connected world – from the cloud to the network to the edge and everything in between. Find more information about Intel at newsroom.intel.com and intel.com.[/vc_column_text][/vc_column][/vc_row]

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Surveillance Mission Planning: Model, Performance Measure, Bi-Objective Analysis, Partial Surveils

Authors:
Ryan Friese, Pacific Northwest National Laboratory (PNNL)
Dr. James Crowder, Colorado Engineering Inc.
Howard Jay Siegel, Elect. and Computer Engineering and Computer Science Depts., Colorado State University
John Carbone, Computer Science Dept., Southern Methodist University

Abstract:
We examine the trade-offs between energy and performance when conducting surveillance mission planning in a multi-vehicle, multi-target, multi-sensor environment. The vehicles are heterogeneous UAVs (unmanned aerial vehicles) that must surveil heterogeneous targets across a geographically distributed area within a given period of time (here, 24 hours). We design a new model for surveilling heterogeneous targets by heterogeneous UAVs. Based on this new model, we define a new system-wide surveillance performance measure that includes the targets surveilled, the number of times each target is surveilled, the UAV used for each surveil, the sensor type on the UAV that is used for each surveil, the priority of each target, and the allowance of partial surveil times. Then we implemented a genetic algorithm (GA) for a bi-objective analysis of energy versus surveillance performance for a set of realistic system parameters. The fitness function for this GA is based on our new model and our new performance measure. We construct a Pareto front of mappings of UAVs and sensors to targets to use to study trade-offs between the two conflicting objectives of maximizing surveillance performance and minimizing energy consumed. We also examine how allowing partial surveils of targets can impact system performance.

Full access to this whitepaper requires submitting the form on the following page. Click the link below to continue.

[download id=”19968″]

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Dr. James A. Crowder Recognized at 2018 World Congress for Outstanding Achievement

LAS VEGAS (July 30, 2018)  – Dr. James A. Crowder, Systems Fellow at Colorado Engineering Inc. (CEI), received the Outstanding Achievement Award for his research contributions to artificial intelligence and for serving as distinguished speaker at the 2018 World Congress in Computer Science, Computer Engineering, and Applied Computing (CSCE’18) event in Las Vegas on July 30, 2018. The award was presented to Dr. Crowder by Dr. Hamid R. Arabnia, Chair of the CSCE 2018 Steering Committee.

Dr. Crowder joined CEI earlier this year. He serves as the expert on artificial intelligence related systems and systems architect. Most recently, he was Senior Principal Systems Engineer at Raytheon Intelligence, Information and Services in Aurora, Colo., and Adjunct Professor at Colorado Technical University in Colorado Springs, Colo. Dr. Crowder’s many publications include journals on systems architecture, artificial intelligence and knowledge management; and books on systems engineering, agile project management, artificial cognition architectures and artificial psychology.

CSCE’18 comprised 20 major conferences under the umbrella of the World Congress; the event hosted 122 technical presentations and many panel discussions and keynote addresses. This year’s event included ~1000 participants from 69 different countries and over 160 universities, major corporations, and government research agencies.   The World Congress facilitates communications among researchers in different fields of engineering and computer science.  Crowder has presented and served as keynote speaker and workshop/panel discussion leader for the past 11 years. Visit https://americancse.org/events/csce2018 for more information on CSCE.

CEI, founded in 2003 with engineering and production facilities in Colorado Springs, Colorado, supplies Commercial-Off-The-Shelf (COTS) high performance computing hardware and software, as well as tailored solutions, working directly with government agencies and for commercial prime contractors, offering quick turn, innovative solutions with lower cost and higher quality while minimizing risk. CEI leads or partners on new radar systems, software and hardware projects, including leading edge efforts in MOSA applications, reconfigurable RF, THz EM propagation modeling, and associated remote sensing system development. CEI is certified as a women’s business enterprise by the Women’s Business Enterprise National Council (WBENC), the nation’s largest third-party certifier of the businesses owned and operated by women in the U.S. Visit https://coloradoengineering.com for more information on CEI.

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Colorado Engineering Unveils First Dual Intel Stratix 10 FPGA, Warp II, at SC17

COLORADO SPRINGS, Colo., Nov. 14, 2017 — Colorado Engineering, Inc. (CEI) unveiled its First Dual Intel Stratix 10 FPGA, Warp II, at Super Computing 2017 (SC17) in Denver. The WARP II PCIe card delivers up to 136GB DDR4 per FPGA, 100GbE, and programmable OpenCL support to address today’s most challenging data-intense computing problems found in high-density data center and cloud service applications.

“WARP II represents the most advanced, off-the-shelf, PCIe, FPGA compute acceleration card in production,” said Larry Scally, PhD., CEI’s President and Chief Technology Officer. “It delivers the power required to turn big data into actionable intelligence. High performance computing applications like machine learning and cognitive computing can all benefit from the performance gains our WARP II delivers.”

In addition to the dual implementation of Intel’s Stratix® 10 FPGAs, the WARP II supports up to 136GB DDR4 per FPGA and 20 TFLOPS of peak performance (10 TFLOPS per FPGA), making it the most efficient, high performance acceleration card in CEI’s long history of delivering custom hardware, software, sensor, or mechanical design support for the most demanding computing challenges. Learn more about Warp II or contact CEI to purchase.

Founded in 2003 with engineering and production facilities located in Colorado Springs, Colorado, CEI supplies Commercial-Off-The-Shelf (COTS) high performance computing hardware and software, as well as tailored solutions, working directly with government agencies and for commercial prime contractors, offering quick turn, innovative solutions with lower cost and higher quality while minimizing risk. CEI leads or partners on new radar systems, software and hardware projects, including leading edge efforts in MOSA applications, reconfigurable RF, THz EM propagation modeling, and associated remote sensing system development. CEI is certified as a women’s business enterprise by the Women’s Business Enterprise National Council (WBENC), the nation’s largest third-party certifier of the businesses owned and operated by women in the U.S. It is also a Platinum Member of Intel’s FPGA Design Solutions Network.

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CEI and Ball Aerospace Developing Sense and Avoid (SAA) Targeted Advanced Radar Technology (START)

COLORADO SPRINGS, Colo., March 12, 2015 – SAA Targeted Advanced Radar Technology (START) Receives SBIR Phase III Award – AF09-133. The CEI team offers a unique perspective on Sense and Avoid (SAA) radar technology that will benefit the program described by this SBIR topic. CEI and Ball Aerospace are developing a radar supporting the SAA mission for Global Hawk under an Air Force Research Laboratory (AFRL)-sponsored program called USTAR: Unmanned Sense, Track, and Avoid Radar. Continue reading CEI and Ball Aerospace Developing Sense and Avoid (SAA) Targeted Advanced Radar Technology (START)